The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs. Each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling-down process generally provides benefits by increasing production efficiency and lowering associated costs.
As technology node sizes decrease and integrated circuits (ICs) become smaller, a microscopic observation of a semiconductor device structure (such as a semiconductor wafer and/or a device under test (DUT)) plays an important role for inspecting yield-limiting defects, design-functional defects and performance-limiting defects.
However, since feature sizes continue to decrease, the microscopic observation of the semiconductor device structure continues to become more difficult to perform. Therefore, it is a challenge to inspect the semiconductor device structures at smaller and smaller sizes.